The present invention generally relates to semiconductor integrated circuit devices, and more particularly to a semiconductor integrated circuit device having a logic circuit which requires a power down mode such as a programmable logic circuit.
Generally, a semiconductor integrated circuit device having a plurality of memory devices and logic devices has a power down mode. In the power down mode, a signal is supplied to those devices which are not used so as to minimize the power consumption of the semiconductor integrated circuit device.
The power consumption of a programmable logic device is large in general, and the power consumption is in the order of 100 mW or more even in the case of a programmable logic device using complementary metal oxide semiconductors (CMOS). In the case of a programmable logic device using bipolar transistors, the power consumption is in the order of 200 mW or more.
Accordingly, a semiconductor integrated circuit device having such a programmable logic device requires the power down mode.
A method of automatically switching an operation mode of the programmable logic device to the power down mode is proposed in Sau-Ching Wong et al., "Novel Circuit Techniques for Zero-Power 25-ns CMOS Erasable Programmable Logic Devices (EPLD's)", IEEE Journal of Solid-State Circuits, Vol. SC-21, No. 5, October 1986. According to this proposed method, the operation mode of the semiconductor integrated circuit device is automatically switched to the power down mode when no external signal is applied to the programmable logic device or when all of the external signals applied to the programmable logic device are fixed to the high level or the low level.
On the other hand, the semiconductor integrated circuit device may be provided with a power down control terminal exclusively for setting the operation mode of the semiconductor integrated circuit device to the power down mode. In this case, the operation mode of the semiconductor integrated circuit device is switched to the power down mode when a power down control signal is applied to the power down control terminal.
For example, in an erasable and programmable read only memory (EPROM) and a static random access memory (SRAM), the power down mode means the inactive mode of the device and the power down control signal is often referred to as a chip enable signal or a chip select signal. When the semiconductor integrated circuit device is in the power down mode, the device does not enter signals other than the power down control signal.
However, in the case of the programmable logic device which automatically takes the power down mode when when no external signal is applied thereto or all of the external signals applied thereto are fixed to the high level or the low level, signals unrelated to the logic operation of the programmable logic device are also entered into the programmable logic device. For this reason, there is a problem in that it is necessary to take measures so that no external signal is applied to the programmable logic device in the power down mode so as to maintain the power down mode. But in actual practice, it is extremely difficult to take measures so that no external signal is applied to the programmable logic device in the power down mode.
On the other hand, in the case of the semiconductor integrated circuit device provided with the power down control terminal exclusively for setting the operation mode of the semiconductor integrated circuit device to the power down mode, the number of terminals which may be used by the user to achieve desired functions becomes limited because of the need to provide the power down control terminal. In other words, only a limited number of terminals can be provided on the semiconductor integrated circuit device, and if one of the limited number of terminals is used exclusively as the power down control terminal, there is a problem in that the number of terminals which may be used to achieve the desired functions becomes one less than the already limited number of terminals. As a result, the design flexibility of the semiconductor integrated circuit device becomes limited.